Vhdl from Simulation to Synthesis

Vhdl from Simulation to Synthesis

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A basic textbook aimed toward undergraduate rather than graduate students, presenting basic VHDL concepts and a framework for thinking and reasoning about the structure and operation of VHDL programs when modeling for simulation and synthesis. Yalamanchili (Georgia Institute of Technology) presents each major language construct from two points of view: for simulation of physical or behavioral attributes of a digital system, and for synthesis of the digital hardware. Tutorials, a description of standard VHDL packages, a starting program template, and a section of hints and observations are included at the end. Annotation c. Book News, Inc., Portland, OR (booknews.com)show more

Product details

  • Book | 401 pages
  • 172.7 x 233.7 x 27.9mm | 589.68g
  • Pearson Education Limited
  • Prentice-Hall
  • Harlow, United Kingdom
  • English
  • 0130290165
  • 9780130290168

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