VHDL '92

VHDL '92 : The New Features of the VHDL Hardware Description Language

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An open process of restandardization, conducted by the IEEE, has led to the definitions of the new VHDL standard. The changes make VHDL safer, more portable, and more powerful. VHDL also becomes bigger and more complete. The canonical simulator of VHDL is enriched by new mechanisms, the predefined environment is more complete, and the syntax is more regular and flexible. Discrepancies and known bugs of VHDL'87 have been fixed. However, the new VHDL'92 is compatible with VHDL'87, with some minor exceptions. This book presents the new VHDL'92 for the VHDL designer. New features are explained and classified. Examples are provided, each new feature is given a rationale and its impact on design methodology, and performance is analyzed. Where appropriate, pitfalls and traps are explained. The VHDL designer should quickly be able to find the feature needed to evaluate the benefits it brings, to modify previous VHDL'87 code to make it more efficient, more portable, and more flexible. This text should be a useful update for all VHDL designers and managers involved in electronic design.
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Product details

  • Hardback | 232 pages
  • 171.45 x 230 x 12.7mm | 589.99g
  • Boston, MA, United States
  • English
  • glossary, figures, index
  • 0792393562
  • 9780792393566

Table of contents

Introduction: 1. Designer's Concerns. 2. Spirit of VHDL'92. New Simulation Mechanisms: 3. Last-Delta Activation. 4. Shared (Global) Variables. New Structuring Mechanisms: 5. Direct Instantiation. 6. Incremental Binding. 7. Groups. New Interfacing Mechanisms: 8. Foreign Interfaces. 9. Reading and Writing Files. 10. Impure Functions. New Predefined Operators, Functions & Attributes: 11. Shift. 12. XNOR. 13. Predefined Attribute Driving-Value. 14. Predefined Attribute Ascending. 15. Predefined Attributes Behaviour & Structure. 16. Predefined Attributes Image & Value. 17. Attributes Path-Name Instance-Name Simple-Name. Slight Enhancements: 18. Inertial Signal Assignment. 19. Declarative Part in Generate Statements. 20. Mapping Expressions to Input Ports. 21. The New Character Set. 22. Identifier Generalization. 23. Alias Generalization. 24. Access to Predefined Operators. 25. Extension of Bit String Literals. Language Simplifications: 26. Concurrent Signal Assignment. 27. Report Statement. 28. Concatenation Operator. 29. Bracketing. Clarification: 30. Static Expressions. 31. Run-Time Checks. 32. Interface List. 33. Association List. 34. Resolved Subelements in Composites. 35. Labels & User-Defined Attributes. 36. Miscellaneous. Annex: 37. List of Reserved Words.
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