Unified low-power design flow for data-dominated multi-media and telecom applications

Unified low-power design flow for data-dominated multi-media and telecom applications : Based on selected partner contributions of the European Low Power Initiative for Electronic System Design of the European Community ESPRIT4 programme

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This book is the first in aseries on novellow power design architectures, methods and design practices. It results from of a large European project started in 1997, whose goal is to promote the further development and the faster and wider industrial use of advanced design methods for reducing the power consumption of electronic systems. Low power design became crucial with the wide spread of portable information and cornrnunication terminals, where a small battery has to last for a long period. High performance electronics, in addition, suffers from a permanent increase of the dissipated power per square millimetre of silicon, due to the increasing eIock-rates, which causes cooling and reliability problems or otherwise limits the performance. The European Union's Information Technologies Programme 'Esprit' did there- fore launch a 'Pilot action for Low Power Design' , wh ich eventually grew to 19 R&D projects and one coordination project, with an overall budget of 14 million Euro. It is meanwhile known as European Low Power Initiative for Electronic System Design (ESD-LPD) and will be completed by the end of 2001. It involves 30 major Euro- pean companies and 20 well-known institutes. The R&D projects aims to develop or demonstrate new design methods for power reduction, while the coordination project takes care that the methods, experiences and results are properly documented and pub- licised.
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Product details

  • Hardback | 181 pages
  • 165.1 x 243.8 x 15.2mm | 453.6g
  • Dordrecht, Netherlands
  • English
  • 2000 ed.
  • XXVI, 181 p.
  • 0792379470
  • 9780792379478

Table of contents

List of Figures. List of Tables. Contributing Authors. Introduction. 1. Motivation, context and objectives; F. Catthoor, et al. 2. Unified meta-flow summary; F. Catthoor, E. Brockmeyer. 3. Low-power processor-level DTSE; E. Brockmeyer, et al. 4. High-level power estimation methodology; P. Lippens, et al. 5. Custom regular processor synthesis flow; R. Woods, et al. 6. Power Management for Digital Receivers; N.D. Zervas, et al. 7. Synthesis of Sum-of-Products Computations; K. Masselos, C.E. Goutis. References. Index.
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