Through Silicon Vias

Through Silicon Vias : Materials, Models, Design, and Performance

By (author)  , By (author)  , By (author)  , By (author) 

Free delivery worldwide

Available. Dispatched from the UK in 3 business days
When will my order arrive?


Recent advances in semiconductor technology offer vertical interconnect access (via) that extend through silicon, popularly known as through silicon via (TSV). This book provides a comprehensive review of the theory behind TSVs while covering most recent advancements in materials, models and designs. Furthermore, depending on the geometry and physical configurations, different electrical equivalent models for Cu, carbon nanotube (CNT) and graphene nanoribbon (GNR) based TSVs are presented. Based on the electrical equivalent models the performance comparison among the Cu, CNT and GNR based TSVs are also discussed.
show more

Product details

  • Hardback | 216 pages
  • 156 x 235 x 19.05mm | 590g
  • Productivity Press
  • Portland, United States
  • English
  • Lines - 202; Total - 310; 23 Tables, black and white; 28 Illustrations, color; 108 Illustrations, black and white
  • 1498745520
  • 9781498745529

Table of contents

3D Technology and Packaging Techniques. Introduction. Packaging techniques of future ICs. Integrated architectures. Summary. Through Silicon Vias: Materials, Properties and Fabrication. Introduction. History of graphene material. Carbon nanotube. Graphene nanoribbon. Properties of TSV. Fabrication of TSVs. Challenges for the TSV implementations. Summary. Copper Based TSVs. Introduction. Physical configuration. Modelling of Cu based TSVs. Performance analysis of Cu based TSVs. Summary. Carbon Nanotube Based TSVs. Introduction. Physical configuration. Modelling. Performance analysis of CNT based TSVs. Summary. Mixed CNT Bundled Based TSVs. Introduction. Configurations of mixed CNT bundled TSVs. Modelling of MCB based TSVs. Signal integrity analysis of MCB based TSVs. Summary. Graphene Nanoribbon Based TSVs. Introduction. Configurations of GNR based TSVs. Fabrication challenges and limitations. Modelling of GNR based TSVs with smooth edges. Modelling of GNR based TSVs with rough edges. Signal integrity analysis of GNR based TSVs. Summary. Liners in TSVs. Introduction. Types of liners and their impact on performance. Fabrication challenges. Modelling of CNT bundled TSV with SiO2 and polymer liners. Impact of polymer liners on delay. Summary.
show more

About Brajesh Kumar Kaushik

Brajesh Kumar Kaushik received the B.E. degree in Electronics and Communication Engineering from the D.C.R. University of Science and Technology (formerly C. R. State College of Engineering), Murthal, Haryana, in 1994, the M.Tech degree in Engineering Systems from Dayalbagh Educational Institute, Agra, India, in 1997, and the PhD degree under AICTE-QIP scheme from the Indian Institute of Technology Roorkee, Roorkee, India, in 2007. He is currently serving as Associate Professor in the Department of Electronics and Communication Engineering, Indian Institute of Technology Roorkee. His research interests include high-speed interconnects, low-power VLSI design, carbon nanotube-based designs, organic thin-film transistor design and modeling, and spintronics-based devices and circuits. He has published extensively in several national and international journals and conferences of repute. Dr. Kaushik is a reviewer of many international journals belonging to various publication houses such as IEEE, IET, Elsevier, Springer, Emerald, Taylor and Francis etc. He has also delivered many keynote addresses in reputed international and national conferences. He also holds the position of the Editor and Editor-in-Chief of various journals in the field of VLSI and microelectronics. Dr. Kaushik is Editor-in-Chief of International Journal of VLSI Design and Communication System (VLSICS), AIRCC Publishing Corporation. He also holds the position of Editor of Microelectronics Journal (MEJ), Elsevier Inc.; Journal of Engineering, Design and Technology (JEDT), Emerald Group Publishing Limited; and Journal of Electrical and Electronics Engineering Research (JEEER), Academic Journals. He is a Senior Member of IEEE and has received many awards and recognitions from the International Biographical Center, Cambridge, U.K. His name has been listed in Marquis Who's Who in Science and Engineering and Marquis Who's Who in the World.
show more