System on Chip Interfaces for Low Power Design

System on Chip Interfaces for Low Power Design

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Description

System on Chip Interfaces for Low Power Design provides a top-down understanding of interfaces available to SoC developers, not only the underlying protocols and architecture of each, but also how they interact and the tradeoffs involved. The book offers a common context to help understand the variety of available interfaces and make sense of technology from different vendors aligned with multiple standards. With particular emphasis on power as a factor, the authors explain how each interface performs in various usage scenarios and discuss their advantages and disadvantages. Readers learn to make educated decisions on what interfaces to use when designing systems and gain insight for innovating new/custom interfaces for a subsystem and their potential impact.
Provides a top-down guide to SoC interfaces for memory, multimedia, sensors, display, and communicationExplores the underlying protocols and architecture of each interface with multiple examplesGuides through competing standards and explains how different interfaces might interact or interfere with each otherExplains challenges in system design, validation, debugging and their impact on development
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Product details

  • Electronic book text | 464 pages
  • 191 x 235mm
  • Morgan Kaufmann Publishers In
  • San Francisco, United States
  • English
  • 0128017902
  • 9780128017906

Table of contents

SoC Design Fundamentals and EvolutionUnderstanding Power Consumption FundamentalsGeneric SoC Architecture and ComponentsDisplay InterfacesMultimedia InterfacesCommunication InterfacesMemory InterfacesSecurity InterfacesPower InterfacesSensor InterfacesInput Device InterfacesDebug Interfaces Appendix A: Overview of Intel SoC: Baytrail Appendix B: Industry Consortiums Appendix C: USB3.0
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