Networks on Chips
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Networks on Chips : Technology and Tools

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Description

The design of today's semiconductor chips for various applications, such as telecommunications, poses various challenges due to the complexity of these systems. These highly complex systems-on-chips demand new approaches to connect and manage the communication between on-chip processing and storage components and networks on chips (NoCs) provide a powerful solution.

This book is the first to provide a unified overview of NoC technology. It includes in-depth analysis of all the on-chip communication challenges, from physical wiring implementation up to software architecture, and a complete classification of their various Network-on-Chip approaches and solutions.
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Product details

  • Hardback | 408 pages
  • 195.6 x 236.2 x 27.9mm | 975.23g
  • Morgan Kaufmann Publishers In
  • San Francisco, United States
  • English
  • Approx. 250 illustrations; Illustrations, unspecified
  • 0123705215
  • 9780123705211

Table of contents

I. Introduction and Motivation
II. Architectures for NoCs
III. Physical network layer
IV. Data-link layer and encoding
V. Switching and Routing in NoCs
VI. Software for NoCs
VII. Tools for NoC Design
VIII. On-Chip multiprocessors
IX. SoCs based on NoCs
Examples of other design chips using NoCs
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Review Text

"The design of a complex SoC requires the mastering of two major tasks: The design of the computational elements and of their interconnect. The exponentially increasing complexity and heterogeneity of future SoCs forces the designer to abandon traditional bus -based structures and to implement innovative networks-on-chip. This book, written by two leading researchers, is the first of its kind. It is a must on the bookshelf of anybody having an interest in SoC design. - Heinrich Meyr, Professor RWTH Aachen University and Chief Scientific officer, CoWare, Inc.

"This is a highly recommended, informative reference book, with high quality contents provided by the leading experts of the area. - Professor Bashir M. Al-Hashimi, Electronic Systems Design Group, Department of Electronics and Computer Science, University of Southampton, UK

"An in-depth analysis of all the on-chip communication challenges, from physical wiring implementation up to software architecture, and a complete classification of their various Network-on-Chip approaches and solutions, make this book a reference for engineers involved in specification, design or evaluation of NoC architectures. -Philippe Martin, Product Marketing Director, Arteris

"Designers of Systems-on-a-Chip (SoC) are now struggling with the uncertainty of deep submicron devices and an explosion of system complexity. Networks on Chip (NoC) is a new paradigm of SoC design at the system architecture level. A protocol stack of NoC introduced in this book shows a global solution to manage the complicated design problems of SoC. This book gives a clear and systematic methodology of NoC design and will release designers from the nightmare of fights against signal integrity, reliability and variability. - Hiroto Yasuura, Director and Professor, System LSI Research Center (SLRC), Kyushu University, Fukuoka, Japan "The design of a complex SoC requires the mastering of two major tasks: The design of the computational elements and of their interconnect. The exponentially increasing complexity and heterogeneity of future SoCs forces the designer to abandon traditional bus -based structures and to implement innovative networks-on-chip. This book, written by two leading researchers, is the first of its kind. It is a must on the bookshelf of anybody having an interest in SoC design. - Heinrich Meyr, Professor RWTH Aachen University and Chief Scientific officer, CoWare, Inc.

"This is a highly recommended, informative reference book, with high quality contents provided by the leading experts of the area. - Professor Bashir M. Al-Hashimi, Electronic Systems Design Group, Department of Electronics and Computer Science, University of Southampton, UK

"An in-depth analysis of all the on-chip communication challenges, from physical wiring implementation up to software architecture, and a complete classification of their various Network-on-Chip approaches and solutions, make this book a reference for engineers involved in specification, design or evaluation of NoC architectures. -Philippe Martin, Product Marketing Director, Arteris

"Designers of Systems-on-a-Chip (SoC) are now struggling with the uncertainty of deep submicron devices and an explosion of system complexity. Networks on Chip (NoC) is a new paradigm of SoC design at the system architecture level. A protocol stack of NoC introduced in this book shows a global solution to manage the complicated design problems of SoC. This book gives a clear and systematic methodology of NoC design and will release designers from the nightmare of fights against signal integrity, reliability and variability. - Hiroto Yasuura, Director and Professor, System LSI Research Center (SLRC), Kyushu University, Fukuoka, Japan
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Review quote

"The exponentially increasing complexity and heterogeneity of future SoCs forces the designer to abandon traditional bus -based structures and to implement innovative networks-on-chip. This book, written by two leading researchers, is the first of its kind. It is a must on the bookshelf of anybody having an interest in SoC design" - Heinrich Meyr, Professor RWTH Aachen University and Chief Scientific officer, CoWare, Inc.

"This book gives a clear and systematic methodology of NoC design and will release designers from the nightmare of fights against signal integrity, reliability and variability." - Hiroto Yasuura, Director and Professor, System LSI Research Center (SLRC), Kyushu University, Fukuoka, Japan
show more

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