Millimeter-Wave Digitally Intensive Frequency Generation in CMOS
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Millimeter-Wave Digitally Intensive Frequency Generation in CMOS

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Description

This book describes the digitally intensive time-domain architectures and techniques applied to millimeter-wave frequency synthesis, with the objective of improving performance and reducing the cost of implementation. Coverage includes system architecture, system level modeling, critical building block design, and digital calibration techniques, making it highly suitable for those who want to learn about mm-wave frequency generation for communication and radar applications, integrated circuit implementation, and time-domain circuit and system techniques.
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Product details

  • Hardback | 200 pages
  • 152 x 229 x 15.24mm | 430g
  • Academic Press Inc
  • San Diego, United States
  • English
  • black & white illustrations
  • 0128022078
  • 9780128022078

Table of contents

Chapter 1 Introduction Chapter 2 Millimeter-Wave Frequency Synthesizer Architecture Chapter 3 Circuit Design Techniques for mm-Wave Frequency Synthesizer Chapter 4 All-Digital Phase-Locked Loop Chapter 5 Millimeter-Wave Digitally controlled Oscillator Chapter 6 A 60-GHz All-digital PLL for FMCW Transmitter Applications Chapter 7 Digital Techniques for higher RF performance Chapter 8 Design for Test for mm-Wave ADPLL Index
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About Wanghua Wu

Wanghua Wu finished her PhD at the University of Delft in 2013 where she designed the first-ever 60-GHz all-digital PLL (ADPLL) with programmable wideband frequency modulation capability in 65-nm CMOS (from system modeling to IC implementation and testing software development). In 2013 she won the second-prize award in the Broadcom University Research competition for the Ph.D. work on 60-GHz all-digital PLL. She is currently a design engineer at Marvell Semiconductor Inc. Before becoming a university professor in 2009, Robert Bogdan Staszewski was a design engineer / industrial researcher for over 18 years, working in microelectronics and communication systems. He concentrated on large system-on-chip (SoC) designs for wireless applications and before that was involved in analog, RF, mixed-signal and digital designs. His approach is always to discover novel solutions that offer clear advantages over existing designs. His commitment to innovation and quality has resulted in him developing tens of full-custom mixed-signal complex IC chips. He is an IEEE Fellow for his contributions to the digital RF communications systems. John R. Long received the B.Sc. degree in electrical engineering from the University of Calgary, Calgary, AB, Canada, in 1984, and the M.Eng. and Ph.D. degrees in electronics (with distinction) from Carleton University, Ottawa, ON, Canada, in 1992 and 1996, respectively. He was with Bell-Northern Research for ten years designing ASICs for Gbit/s fibre-optic transmission systems and from 1996 to 2001 as an Assistant and then Associate Professor with the University of Toronto, Toronto, ON, Canada. Since January 2002, he has been Chair of the Electronics Research Laboratory, Delft University of Technology, Delft, The Netherlands. His current research interests include transceiver circuits for high-frequency, high-speed, and low-power integrated wireless/wireline systems.
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