Logical Effort
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Logical Effort : Designing Fast CMOS Circuits

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Description

Designers of high-speed integrated circuits face a bewildering array of choices and too often spend frustrating days tweaking gates to meet speed targets. Logical Effort: Designing Fast CMOS Circuits makes high speed design easier and more methodical, providing a simple and broadly applicable method for estimating the delay resulting from factors such as topology, capacitance, and gate sizes.

The brainchild of circuit and computer graphics pioneers Ivan Sutherland and Bob Sproull, "logical effort" will change the way you approach design challenges. This book begins by equipping you with a sound understanding of the method's essential procedures and concepts-so you can start using it immediately. Later chapters explore the theory and finer points of the method and detail its specialized applications.
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Product details

  • Paperback | 256 pages
  • 187.71 x 233.43 x 10.41mm | 490g
  • Morgan Kaufmann Publishers In
  • San Francisco, United States
  • English
  • 1558605576
  • 9781558605572

Table of contents

1 The Method of Logical Effort
2 Design Examples
3 Deriving the Method of Logical Effort
4 Calculating the Logical Effort of Gates
5 Calibrating the Model
6 Asymmetric Logic Gates
7 Unequal Rising and Falling Delays
8 Circuit Families
9 Forks of Amplifiers
10 Branches and Interconnect
11 Wide Structures
12 Conclusions
A Cast of Characters
B Reference process parameters
C Logical Effort Tools
D Solutions
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About Ivan S. Sutherland

Ivan E. Sutherland, a vice president and fellow at Sun Microsystems, received the Turing Award and the Von Neumann Medal for his pioneering contributions in the fields of computer graphics and microelectronic design. Robert F. Sproull is an internationally noted expert on the design of graphics hardware and software. He too is a vice president and fellow at Sun. David Money Harris is an associate professor of engineering at Harvey Mudd College. He received his Ph.D. in electrical engineering from Stanford University and his M.Eng. in electrical engineering and computer science from MIT. Before attending Stanford, he worked at Intel as a logic and circuit designer on the Itanium and Pentium II processors. Since then, he has consulted at Sun Microsystems, Hewlett-Packard, Evans & Sutherland, and other design companies.David's passions include teaching, building chips, and exploring the outdoors. When he is not at work, he can usually be found hiking, mountaineering, or rock climbing. He particularly enjoys hiking with his son, Abraham, who was born at the start of this book project. David holds about a dozen patents and is the author of three other textbooks on chip design, as well as two guidebooks to the Southern California mountains.
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Rating details

6 ratings
4.33 out of 5 stars
5 50% (3)
4 33% (2)
3 17% (1)
2 0% (0)
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