Logic Design for Array-based Circuits : A Structured Design Methodology
Application specific ICs (ASICs) are at the leading edge of the engineering design spectrum, yet less than 10,000 engineers are trained to perform effective logic design procedures using these devices. This book aims to show the reader how to approach the design, covering everything from the circuit specification to the final design acceptance, including what support can be expected, sizing time analysis, power and packaging, the various simulations design verification, and design submission. This up-to-date text presents training material on arrays for practicing engineers. It acts as a supplement to materials provided by manufacturers and aims to efficiently train engineers in array-integrated circuits by using examples, checklists, and basic structural design. It is designed to support all vendors and all arrays. Coding is included.
- Hardback | 332 pages
- 149.86 x 231.14 x 22.86mm | 635.03g
- 01 Sep 1992
- Elsevier Science Publishing Co Inc
- Academic Press Inc
- San Diego, United States
- index, glossary
Table of contents
Structured design methodology; sizing the design; design optimization; timing analysis for arrays; external set-up and hold times; power considerations; simulation; faults and fault detection; design submission.