Integrated Fiber-Optic Receivers

Integrated Fiber-Optic Receivers

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Integrated Fiber-Optic Receivers covers many aspects of the design of integrated circuits for fiber-optic receivers and other high-speed serial data links. Fundamental concepts are explained at the system level, circuit level, and semiconductor device level. Techniques for extracting timing information from the random data stream are described in considerable detail, as are all other aspects of receiver design. Integrated Fiber-Optic Receivers is organized in two parts. Part I covers the theory of communications systems as it applies to high-speed PAM (Pulse Amplitude Modulation) systems. The primary emphasis is on clock recovery circuits.
Because theoretical concepts are generally grasped more easily by example, Part II is devoted to circuit design issues that illustrate example realizations of architectures described in Part I. Part II presents the transistor-level design, and measured results, of fundamental building blocks and test circuits.
For practicing engineers, more than just reporting on the results of specific circuits, this book serves as a tutorial on the design of integrated high-speed broadband PAM data systems, such as: repeaters in long-haul, fiber-optic, trunk-lines transceivers for use in LANs and WANs; read channels for high-density data storage devices; and wireless communication handsets. Integrated Fiber-Optic Receivers may be used as a text for advanced courses in both analog circuit design and communication systems.
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Product details

  • Hardback | 462 pages
  • 155 x 235 x 33.02mm | 1,890g
  • Dordrecht, Netherlands
  • English
  • 1995 ed.
  • XXI, 462 p.
  • 0792395492
  • 9780792395492

Table of contents

Preface. Part I: System Considerations. 1. Integrated Fiber-Optic Receivers. 2. Mathematical Preliminaries. 3. Optimal Decision Theory. 4. Clock Recovery. 5. Practical High-Speed Clock Recovery. Part II: Circuit Design. 6. Heterojunction Bipolar Transistors. 7. Low-Noise Preamplifier. 8. Voltage Controlled Oscillators. 9. 6-GHz Phase=Lock Loop. 10. Clock Recovery and Data Retiming IC. Index.
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