High Performance Parallelism Pearls Volume Two

High Performance Parallelism Pearls Volume Two : Multicore and Many-core Programming Approaches

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High Performance Parallelism Pearls Volume 2 offers another set of examples that demonstrate how to leverage parallelism. Similar to Volume 1, the techniques included here explain how to use processors and coprocessors with the same programming - illustrating the most effective ways to combine Xeon Phi coprocessors with Xeon and other multicore processors. The book includes examples of successful programming efforts, drawn from across industries and domains such as biomed, genetics, finance, manufacturing, imaging, and more. Each chapter in this edited work includes detailed explanations of the programming techniques used, while showing high performance results on both Intel Xeon Phi coprocessors and multicore processors. Learn from dozens of new examples and case studies illustrating "success stories" demonstrating not just the features of Xeon-powered systems, but also how to leverage parallelism across these heterogeneous systems.
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Product details

  • Paperback | 592 pages
  • 191 x 235 x 40mm | 505g
  • Morgan Kaufmann Publishers In
  • San Francisco, United States
  • English
  • black & white illustrations
  • 0128038195
  • 9780128038192
  • 1,785,311

Table of contents

Numerical Weather Prediction Optimization
WRF Goddard Microphysics Scheme Optimization
Pairwise DNA Sequence Alignment Optimization
Accelerated Structural Bioinformatics for Drug Discovery
Amber PME Molecular Dynamics Optimization
Low-Latency Solutions for Financial Services Applications
Parallel Numerical Methods in Finance
Wilson Dslash Kernel from Lattice QCD Optimization
Cosmic Microwave Background Analysis: Nested Parallelism
Visual Search Optimization
Radio Frequency Ray Tracing
Exploring Use of the Reserved Core
High Performance Python Offloading
Fast Matrix Computations on Heterogeneous Streams
MPI-3 Shared Memory Programming Introduction
Coarse-Grained OpenMP for Scalable Hybrid Parallelism
Exploiting Multilevel Parallelism in Quantum Simulations
OpenCL: There and Back Again
OpenMP Versus OpenCL: Difference in Performance?
Prefetch Tuning Optimizations
SIMD Functions Via OpenMP
Vectorization Advice
Portable Explicit Vectorization Intrinsics
Power Analysis for Applications and Data Centers
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About Jim Jeffers

Jim Jeffers was the primary strategic planner and one of the first full-time employees on the program that became Intel (R) MIC. He served as lead SW Engineering Manager on the program and formed and launched the SW development team. As the program evolved, he became the workloads (applications) and SW performance team manager. He has some of the deepest insight into the market, architecture and programming usages of the MIC product line. He has been a developer and development manager for embedded and high performance systems for close to 30 years. James Reinders is a senior engineer who joined Intel Corporation in 1989 and has contributed to projects including the world's first TeraFLOP supercomputer (ASCI Red), as well as compilers and architecture work for a number of Intel processors and parallel systems. James has been a driver behind the development of Intel as a major provider of software development products, and serves as their chief software evangelist. James has published numerous articles, contributed to several books and is widely interviewed on parallelism. James has managed software development groups, customer service and consulting teams, business development and marketing teams. James is sought after to keynote on parallel programming, and is the author/co-author of three books currently in print including Structured Parallel Programming, published by Morgan Kaufmann in 2012.
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