A Guide to VHDL

A Guide to VHDL

By (author)  , By (author) 

List price: US$99.01

Currently unavailable

We can notify you when this item is back in stock

Add to wishlist

AbeBooks may have this title (opens in new window).

Try AbeBooks

Description

"A Guide to VHDL" is intended for the working engineer who needs to develop, document, simulate and synthesize a design using the VHDL language. It is a guide for system and chip designers who are working with VHDL CAD tools and who have some experience programming in FORTRAN, PASCAL or C and have used a logic simulator. The work includes a number of paper exercises and computer lab experiments. If a compiler/simulator is available to the reader, then the lab exercises included in the chapter can be run to reinforce the learning experience. For practical purposes, the book keeps simulator-specific text to a minimum, but does use the Synopsys VHDL Simulator command language in a few cases. The guide can be used as a primer since its contents are appropriate for an introductory course in VHDL.
show more

Product details

  • Hardback | 368 pages
  • 182.88 x 259.08 x 73.66mm | 929.86g
  • United States
  • English
  • bibliography, index
  • 0792392558
  • 9780792392552

Table of contents

VHDL designs; primitive elements 1+1 does not equal 2; sequential statements; advanced types; signals and signal assignments; concurrent statements; structural VHDL; packages and libraries; advanced topics; VHD: and logic synthesis; VHDL structure and syntax - reserved words, application examples.
show more