The Design of Low Noise Oscillators
It is hardly a revelation to note that wireless and mobile communications have grown tremendously during the last few years. This growth has placed stringent requi- ments on channel spacing and, by implication, on the phase noise of oscillators. C- pounding the challenge has been a recent drive toward implementations of transceivers in CMOS, whose inferior 1/f noise performance has usually been thought to disqualify it from use in all but the lowest-performance oscillators. Low noise oscillators are also highly desired in the digital world, of course. The c- tinued drive toward higher clock frequencies translates into a demand for ev- decreasing jitter. Clearly, there is a need for a deep understanding of the fundamental mechanisms g- erning the process by which device, substrate, and supply noise turn into jitter and phase noise. Existing models generally offer only qualitative insights, however, and it has not always been clear why they are not quantitatively correct.
- Hardback | 208 pages
- 157.48 x 236.22 x 20.32mm | 430.91g
- 28 Feb 1999
- Dordrecht, Netherlands
- 1999 ed.
- XII, 208 p.
Table of contents
1. Introduction. 2. Frequency Instability Fundamentals. 3. Review of Existing Models. 4. Time-Variant Phase Noise Model. 5. Jitter and Phase Noise in Ring Oscillators. 6. Phase Noise in Differential LC Oscillators. 7. Extension of the Model to Multiple Noise Sources. 8. Conclusion. A: Relationship between Jitter and Phase Noise. B: Power Spectral Density of the Output. C: The ISF of an Ideal LC Oscillator. D: Calculation of the ISF. E: Phase Noise and Jitter in Phase-Locked Loops. F: Describing Function Analysis of Oscillators. Bibliography. Index.