Computer Organization and Design, Revised Printing, Third Edition

Computer Organization and Design, Revised Printing, Third Edition : The Hardware/Software Interface

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What's New in the Third Edition, Revised Printing

The same great book gets better! This revised printing features all of the original content along with these additional features:

* Appendix A (Assemblers, Linkers, and the SPIM Simulator) has been moved from the CD-ROM into the printed book

* Corrections and bug fixes

Third Edition features

New pedagogical features

* Understanding Program Performance
- Analyzes key performance issues from the programmer's perspective
* Check Yourself Questions
- Helps students assess their understanding of key points of a section
* Computers In the Real World
- Illustrates the diversity of applications of computing technology beyond traditional desktop and servers
* For More Practice
- Provides students with additional problems they can tackle
* In More Depth
- Presents new information and challenging exercises for the advanced student

New reference features

* Highlighted glossary terms and definitions appear on the book page, as bold-faced entries in the index, and as a separate and searchable reference on the CD.
* A complete index of the material in the book and on the CD appears in the printed index and the CD includes a fully searchable version of the same index.
* Historical Perspectives and Further Readings have been updated and expanded to include the history of software R&D.
* CD-Library provides materials collected from the web which directly support the text.

In addition to thoroughly updating every aspect of the text to reflect the most current computing technology, the third edition

* Uses standard 32-bit MIPS 32 as the primary teaching ISA.
* Presents the assembler-to-HLL translations in both C and Java.
* Highlights the latest developments in architecture in Real Stuff sections:
- Intel IA-32
- Power PC 604
- Google's PC cluster
- Pentium P4
- SPEC CPU2000 benchmark suite for processors
- SPEC Web99 benchmark for web servers
- EEMBC benchmark for embedded systems
- AMD Opteron memory hierarchy
- AMD vs. 1A-64

New support for distinct course goals

Many of the adopters who have used our book throughout its two editions are refining their courses with a greater hardware or software focus. We have provided new material to support these course goals:

New material to support a Hardware Focus

* Using logic design conventions
* Designing with hardware description languages
* Advanced pipelining
* Designing with FPGAs
* HDL simulators and tutorials
* Xilinx CAD tools

New material to support a Software Focus

* How compilers work
* How to optimize compilers
* How to implement object oriented languages
* MIPS simulator and tutorial
* History sections on programming languages, compilers, operating systems and databases

On the CD

* NEW: Search function to search for content on both the CD-ROM and the printed text
* CD-Bars: Full length sections that are introduced in the book and presented on the CD
* CD-Appendixes: Appendices B-D
* CD-Library: Materials collected from the web which directly support the text
* CD-Exercises: For More Practice provides exercises and solutions for self-study
* In More Depth presents new information and challenging exercises for the advanced or curious student
* Glossary: Terms that are defined in the text are collected in this searchable reference
* Further Reading: References are organized by the chapter they support
* Software: HDL simulators, MIPS simulators, and FPGA design tools
* Tutorials: SPIM, Verilog, and VHDL
* Additional Support: Processor Models, Labs, Homeworks, Index covering the book and CD contents

Instructor Support

Instructor support provided on

* Solutions to all the exercises
* Figures from the book in a number of formats
* Lecture slides prepared by the authors and other instructors
* Lecture notes
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Product details

  • Paperback | 741 pages
  • 200.66 x 228.6 x 38.1mm | 1,292.73g
  • Morgan Kaufmann Publishers In
  • San Francisco, United States
  • English
  • Revised
  • 3rd edition
  • 0123706068
  • 9780123706065
  • 551,703

Table of contents

1 Computer Abstractions and Technology
2 Instructions: Language of the Computer
3 Arithmetic for Computers
4 Assessing and Understanding Performance
5 The Processor: Datapath and Control
6 Enhancing Performance with Pipelining
7 Large and Fast: Exploiting Memory Hierarchy
8 Storage, Networks, and Other Peripherals
On the CD:
9 Multiprocessors
Appendix A: Assemblers, Linkers, and the Spim simulator
Appendix B: The Basics of Logic Design
Appendix C: Mapping Control to Hardware
Appendix D: A Survey of RISC Architectures for Desktop, Server, and Embedded Computers
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About David A. Patterson

David A. Patterson was the first in his family to graduate from college (1969 A.B UCLA), and he enjoyed it so much that he didn't stop until a PhD, (1976 UCLA). After 4 years developing a wafer-scale computer at Hughes Aircraft, he joined U.C. Berkeley in 1977. He spent 1979 at DEC working on the VAX minicomputer. He and colleagues later developed the Reduced Instruction Set Computer (RISC). By joining forces with IBM's 801 and Stanford's MIPS projects, RISC became widespread. In 1984 Sun Microsystems recruited him to start the SPARC architecture. In 1987, Patterson and colleagues wondered if tried building dependable storage systems from the new PC disks. This led to the popular Redundant Array of Inexpensive Disks (RAID). He spent 1989 working on the CM-5 supercomputer. Patterson and colleagues later tried building a supercomputer using standard desktop computers and switches. The resulting Network of Workstations (NOW) project led to cluster technology used by many startups. He is now working on the Recovery Oriented Computing (ROC) project. In the past, he served as Chair of Berkeley's CS Division, Chair and CRA. He is currently serving on the IT advisory committee to the U.S. President and has just been elected President of the ACM. All this resulted in 150 papers, 5 books, and the following honors, some shared with friends: election to the National Academy of Engineering; from the University of California: Outstanding Alumnus Award (UCLA Computer Science Department), McEntyre Award for Excellence in Teaching (Berkeley Computer Science), Distinguished Teaching Award (Berkeley); from ACM: fellow, SIGMOD Test of Time Award, Karlstrom Outstanding Educator Award; from IEEE: fellow, Johnson Information Storage Award, Undergraduate Teaching Award, Mulligan Education Medal, and von Neumann Medal. John L. Hennessy is the president of Stanford University, where he has been a member of the faculty since 1977 in the departments of electrical engineering and computer science. Hennessy is a fellow of the IEEE and the ACM, a member of the National Academy of Engineering, the National Academy of Science, the American Academy of Arts and Sciences, and the Spanish Royal Academy of Engineering. He received the 2001 Eckert-Mauchly Award for his contributions to RISC technology, the 2001 Seymour Cray Computer Engineering Award, and shared the John von Neumann award in 2000 with David Patterson. After completing the project in 1984, he took a one-year leave from the university to co-found MIPS Computer Systems, which developed one of the first commercial RISC microprocessors. After being acquired by Silicon Graphics in 1991, MIPS Technologies became an independent company in 1998, focusing on microprocessors for the embedded marketplace. As of 2004, over 300 million MIPS microprocessors have been shipped in devices ranging from video games and palmtop computers to laser printers and network switches. Hennessy's more recent research at Stanford focuses on the area of designing and exploiting multiprocessors. He helped lead the design of the DASH multiprocessor architecture, the first distributed shared-memory multiprocessors supporting cache coherency, and the basis for several commercial multiprocessor designs, including the Silicon Graphics Origin multiprocessors. Since becoming president of Stanford, revising and updating this text and the more advanced Computer Architecture: A Quantitative Approach has become a primary form of recreation and relaxation.
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Review quote

"The choice of `Real Stuff' is judicious. The `Computers in the Real World' sections are interesting to read and should widen the horizons of the too often too tech-oriented Sophomores and Juniors. On the whole this is a very solid book and the success of the third edition is assured as has been the success of its two predecessors."
-Jean-Loup Baer, University of Washington

"I am very impressed with the new sections 'Computers in the Real World.' It is very interesting and speaks to the students who would like to feel a connection between classroom materials and real-world applications. I am very pleased with the manuscript for the third edition. This revision is well-updated and a comprehensive introduction to the hardware and software fundamentals."
-David Brooks, Harvard University

"The logical development and explanations and examples were always great to begin with. The `Historical Perspectives' have become even better-- they are part of the book that I enjoy most."
-David Harris, Harvey Mudd
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Rating details

1,205 ratings
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3 22% (265)
2 7% (84)
1 2% (27)
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