Computer Architecture

Computer Architecture : A Quantitative Approach

4.08 (845 ratings by Goodreads)
By (author)  , By (author) 

List price: US$89.95

Currently unavailable

Add to wishlist

AbeBooks may have this title (opens in new window).

Try AbeBooks

Description

The era of seemingly unlimited growth in processor performance is over: single chip architectures can no longer overcome the performance limitations imposed by the power they consume and the heat they generate. Today, Intel and other semiconductor firms are abandoning the single fast processor model in favor of multi-core microprocessors--chips that combine two or more processors in a single package. In the fourth edition of Computer Architecture, the authors focus on this historic shift, increasing their coverage of multiprocessors and exploring the most effective ways of achieving parallelism as the key to unlocking the power of multiple processor architectures. Additionally, the new edition has expanded and updated coverage of design topics beyond processor performance, including power, reliability, availability, and dependability.
show more

Product details

  • Paperback | 704 pages
  • 187.96 x 228.6 x 27.94mm | 1,202.01g
  • Morgan Kaufmann Publishers In
  • San Francisco, United States
  • English
  • 4th edition
  • 0123704901
  • 9780123704900
  • 380,051

Review quote

"If Neil Armstrong offers to give you a tour of the lunar module, or Tiger Woods asks you to go play golf with him, you should do it. When Hennessy and Patterson offer to lead you on a tour of where computer architecture is going, they call it Computer Architecture: A Quantitative Approach, 4th Edition. You need one. Tours leave on the hour."
- Robert Colwell, Intel lead designer

"The book has been updated so it covers the latest computer architectures like the 64-bit AMD Opteron as well as those from Sun, Intel and other major vendors ... I highly recommend this book for those learning about computer architecture or those wanting to understand architectures that differ from those they are currently using. It does an excellent job of
covering most of the major architectural approaches employed today."
- William Wong, Electronic Design, November 2006

"Computer hardware is entering into a new era, what with multicore processing, virtualization and other enhancements ... Computer Architecture covers these topics and updates the insightful work in the earlier editions that laid out the full range of metrics needed for evaluating processor performance."
- Joab Jackson, GCN, November 20, 2006
show more

Table of contents

Main Text

Chapter 1: Fundamentals of Computer Design
Chapter 2: Instruction-level Parallelism and its Exploitation
Chapter 3: Advanced Techniques for Exploiting Instruction-level Parallelism and their Limits
Chapter 4: Multiprocessors and Thread-level Parallelism
Chapter 5: Memory Hierarchy Design
Chapter 6: Storage Systems
Appendix A: Pipelining: Basic and Intermediate
Concepts
Appendix B: Instruction Set Principles and Examples
Appendix C: Introduction to Memory Hierarchy

CD
Appendix D: Embedded Systems (contributor: Thomas M. Conte, North Carolina State University)
Appendix E: Interconnection Networks (contributor: Timothy M. Pinkston, USC and Jose Duato, Simula)
Appendix F: Vector Processors (contributor: Krste Asanovic, MIT)
Appendix G: Hardware and Software for VLIW and EPIC
Appendix H: Large-Scale Multiprocessors and Scientific Apps
Appendix I: Computer Arithmetic (contributor: David Goldberg, Xerox PARC)
Appendix J: Survey of Instruction Set Architectures
Appendix K: Historical Perspectives with References
show more

About John L. Hennessy

John L. Hennessy is the president of Stanford University, where he has been a member of the faculty since 1977 in the departments of electrical engineering and computer science. Hennessy is a fellow of the IEEE and the ACM, a member of the National Academy of Engineering, the National Academy of Science, the American Academy of Arts and Sciences, and the Spanish Royal Academy of Engineering. He received the 2001 Eckert-Mauchly Award for his contributions to RISC technology, the 2001 Seymour Cray Computer Engineering Award, and shared the John von Neumann award in 2000 with David Patterson. After completing the project in 1984, he took a one-year leave from the university to co-found MIPS Computer Systems, which developed one of the first commercial RISC microprocessors. After being acquired by Silicon Graphics in 1991, MIPS Technologies became an independent company in 1998, focusing on microprocessors for the embedded marketplace. As of 2004, over 300 million MIPS microprocessors have been shipped in devices ranging from video games and palmtop computers to laser printers and network switches. Hennessy's more recent research at Stanford focuses on the area of designing and exploiting multiprocessors. He helped lead the design of the DASH multiprocessor architecture, the first distributed shared-memory multiprocessors supporting cache coherency, and the basis for several commercial multiprocessor designs, including the Silicon Graphics Origin multiprocessors. Since becoming president of Stanford, revising and updating this text and the more advanced Computer Architecture: A Quantitative Approach has become a primary form of recreation and relaxation. David A. Patterson was the first in his family to graduate from college (1969 A.B UCLA), and he enjoyed it so much that he didn't stop until a PhD, (1976 UCLA). After 4 years developing a wafer-scale computer at Hughes Aircraft, he joined U.C. Berkeley in 1977. He spent 1979 at DEC working on the VAX minicomputer. He and colleagues later developed the Reduced Instruction Set Computer (RISC). By joining forces with IBM's 801 and Stanford's MIPS projects, RISC became widespread. In 1984 Sun Microsystems recruited him to start the SPARC architecture. In 1987, Patterson and colleagues wondered if tried building dependable storage systems from the new PC disks. This led to the popular Redundant Array of Inexpensive Disks (RAID). He spent 1989 working on the CM-5 supercomputer. Patterson and colleagues later tried building a supercomputer using standard desktop computers and switches. The resulting Network of Workstations (NOW) project led to cluster technology used by many startups. He is now working on the Recovery Oriented Computing (ROC) project. In the past, he served as Chair of Berkeley's CS Division, Chair and CRA. He is currently serving on the IT advisory committee to the U.S. President and has just been elected President of the ACM. All this resulted in 150 papers, 5 books, and the following honors, some shared with friends: election to the National Academy of Engineering; from the University of California: Outstanding Alumnus Award (UCLA Computer Science Department), McEntyre Award for Excellence in Teaching (Berkeley Computer Science), Distinguished Teaching Award (Berkeley); from ACM: fellow, SIGMOD Test of Time Award, Karlstrom Outstanding Educator Award; from IEEE: fellow, Johnson Information Storage Award, Undergraduate Teaching Award, Mulligan Education Medal, and von Neumann Medal.
show more

Rating details

845 ratings
4.08 out of 5 stars
5 43% (363)
4 33% (276)
3 17% (140)
2 5% (44)
1 3% (22)
Book ratings by Goodreads
Goodreads is the world's largest site for readers with over 50 million reviews. We're featuring millions of their reader ratings on our book pages to help you find your new favourite book. Close X