Cache Memory Book, The

Cache Memory Book, The

4.66 (12 ratings by Goodreads)
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Description

The Second Edition of The Cache Memory Book introduces systems designers to the concepts behind cache design. The book teaches the basic cache concepts and more exotic techniques. It leads readers through someof the most intricate protocols used in complex multiprocessor caches. Written in an accessible, informal style, this text demystifies cache memory design by translating cache concepts and jargon into practical methodologies and real-life examples. It also provides adequate detail to serve as a reference book for ongoing work in cache memory design.
The Second Edition includes an updated and expanded glossary of cache memory terms and buzzwords. The book provides new real world applications of cache memory design and a new chapter on cache"tricks".
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Product details

  • Hardback | 229 pages
  • 154 x 230 x 22mm | 557.92g
  • Morgan Kaufmann Publishers In
  • San Francisco, United States
  • English
  • 2nd edition
  • 0123229804
  • 9780123229809
  • 1,770,351

Table of contents

What is Cache Memory? How are Caches Designed? Cache Memories and RISC Processors. Maintaining Coherency in Cached Systems. Cute Cache Tricks. Subject Index.
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Review quote

"The Cache Memory Book, written by Jim Handy, a senior analyst for semiconductor memories at Dataquest Corporation, San Jose, California, provides designers with an in-depth analysis of cache approaches and implementation discussions." --Dave Burskey in ELECTRONIC DESIGN

"While written with the professional designer in mind, this book is easily accessible to interested laypeople. Its explanations about how caches work and the different policies that must be addressed by a cache designer are among the best Ive ever read. If you need to know how cache memory systems work, read The Cache Memory Book." --Bob Ryan in BYTE Magazine
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About Jim Handy

Jim Handy is a Principal Analyst for memories in Dataquest's Semiconductor group. He is a frequent lecturer and writer on the subject of cache memorydesign and is a patent holder in the cache design field.
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Rating details

12 ratings
4.66 out of 5 stars
5 67% (8)
4 33% (4)
3 0% (0)
2 0% (0)
1 0% (0)
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