• Computer Architecture: A Quantitative Approach See large image

    Computer Architecture: A Quantitative Approach (The Morgan Kaufmann Series in Computer Architecture and Design) (Paperback) By (author) John L. Hennessy, By (author) David A. Patterson

    $67.08 - Save $21.71 24% off - RRP $88.79 Free delivery worldwide Available
    Dispatched in 2 business days
    When will my order arrive?
    Add to basket | Add to wishlist |

    DescriptionComputer Architecture: A Quantitative Approach explores the ways that software and technology in the cloud are accessed by digital media, such as cell phones, computers, tablets, and other mobile devices. The book became a part of Intel's 2012 recommended reading list for developers, and it covers the revolution of mobile computing. The text also highlights the two most important factors in architecture today: parallelism and memory hierarchy. The six chapters that this book is composed of follow a consistent framework: explanation of the ideas in each chapter; a "crosscutting issues" section, which presents how the concepts covered in one chapter connect with those given in other chapters; a "putting it all together" section that links these concepts by discussing how they are applied in real machine; and detailed examples of misunderstandings and architectural traps commonly encountered by developers and architects. The first chapter of the book includes formulas for energy, static and dynamic power, integrated circuit costs, reliability, and availability. Chapter 2 discusses memory hierarchy and includes discussions about virtual machines, SRAM and DRAM technologies, and new material on Flash memory. The third chapter covers the exploitation of instruction-level parallelism in high-performance processors, superscalar execution, dynamic scheduling and multithreading, followed by an introduction to vector architectures in the fourth chapter. Chapters 5 and 6 describe multicore processors and warehouse-scale computers (WSCs), respectively. This book is an important reference for computer architects, programmers, application developers, compiler and system software developers, computer system designers and application developers. * Part of Intel's 2012 Recommended Reading List for Developers* Updated to cover the mobile computing revolution* Emphasizes the two most important topics in architecture today: memory hierarchy and parallelism in all its forms.* Develops common themes throughout each chapter: power, performance, cost, dependability, protection, programming models, and emerging trends ("What's Next")* Includes three review appendices in the printed text. Additional reference appendices are available online.* Includes updated Case Studies and completely new exercises.


Other books

Other people who viewed this bought | Other books in this category
Showing items 1 to 10 of 10

 

Reviews | Bibliographic data
  • Full bibliographic data for Computer Architecture

    Title
    Computer Architecture
    Subtitle
    A Quantitative Approach
    Authors and contributors
    By (author) John L. Hennessy, By (author) David A. Patterson
    Physical properties
    Format: Paperback
    Number of pages: 856
    Width: 191 mm
    Height: 236 mm
    Thickness: 46 mm
    Weight: 1,746 g
    Language
    English
    ISBN
    ISBN 13: 9780123838728
    ISBN 10: 012383872X
    Classifications

    BIC E4L: COM
    Nielsen BookScan Product Class 3: S10.2
    B&T Book Type: NF
    B&T Modifier: Region of Publication: 01
    B&T Modifier: Academic Level: 01
    BIC subject category V2: UYF
    Libri: ENGL5000, ENGM1000
    B&T Modifier: Text Format: 06
    B&T General Subject: 229
    B&T Modifier: Text Format: 01
    B&T Merchandise Category: COM
    Warengruppen-Systematik des deutschen Buchhandels: 16370
    Ingram Subject Code: XG
    DC22: 004.2
    LC subject heading:
    B&T Approval Code: A93500000
    DC22: 004.22, 004.2/2
    BISAC V2.8: COM011000
    Libri: ARCH8100, RECG6000, DATE6993
    LC classification: QA76.9.A73 P377 2012
    Thema V1.0: UYF
    Edition
    5, Revised
    Edition statement
    5th Revised edition
    Publisher
    ELSEVIER SCIENCE & TECHNOLOGY
    Imprint name
    Morgan Kaufmann Publishers In
    Publication date
    01 November 2011
    Publication City/Country
    San Francisco
    Author Information
    John L. Hennessy is the tenth president of Stanford University, where he has been a member of the faculty since 1977 in the departments of electrical engineering and computer science. Hennessy is a Fellow of the IEEE and ACM; a member of the National Academy of Engineering, the National Academy of Science, and the American Philosophical Society; and a Fellow of the American Academy of Arts and Sciences. Among his many awards are the 2001 Eckert-Mauchly Award for his contributions to RISC technology, the 2001 Seymour Cray Computer Engineering Award, and the 2000 John von Neumann Award, which he shared with David Patterson. He has also received seven honorary doctorates. David A. Patterson has been teaching computer architecture at the University of California, Berkeley, since joining the faculty in 1977, where he holds the Pardee Chair of Computer Science. His teaching has been honored by the Distinguished Teaching Award from the University of California, the Karlstrom Award from ACM, and the Mulligan Education Medal and Undergraduate Teaching Award from IEEE. Patterson received the IEEE Technical Achievement Award and the ACM Eckert-Mauchly Award for contributions to RISC, and he shared the IEEE Johnson Information Storage Award for contributions to RAID. He also shared the IEEE John von Neumann Medal and the C & C Prize with John Hennessy. Like his co-author, Patterson is a Fellow of the American Academy of Arts and Sciences, the Computer History Museum, ACM, and IEEE, and he was elected to the National Academy of Engineering, the National Academy of Sciences, and the Silicon Valley Engineering Hall of Fame. He served on the Information Technology Advisory Committee to the U.S. President, as chair of the CS division in the Berkeley EECS department, as chair of the Computing Research Association, and as President of ACM. This record led to Distinguished Service Awards from ACM and CRA.
    Review quote
    "What has made this book an enduring classic is that each edition is not an update, but an extensive revision that presents the most current information and unparalleled insight into this fascinating and fast changing field. For me, after over twenty years in this profession, it is also another opportunity to experience that student-grade admiration for two remarkable teachers." - From the Foreword by Luiz Andr Barroso, Google, Inc. "This is an academic textbook that is also suitable for a far broader readership. Each chapter is organised in the same structure, with the main content supported by case studies and exercises. Having read this book I now have a far better understanding of why processors from all the different designers and manufacturers are so different. Memory hierarchies, multicore architectures and compiler optimisation are all covered in great detail. I was particularly interested in their discussion of graphical processing units and how they are suitable for far more than just graphical workloads. What is great about this book is that it moves with the times. There is a lot of content on processors for mobile computing, and power usage is a pervasive theme. At the other extreme there is an excellent chapter on warehouse scale computers, which offers tremendous insight into the cloud computing infrastructure provided by Google, Amazon and others. If your job has anything to do with IT infrastructure then I recommend this book as a must-read. As an academic text book it has both depth and breadth. And if you're just interested in the topic you'll gain a huge amount of insight into the fundamentals of computer architecture."--The Chartered Institute for IT
    Table of contents
    Printed Text Chap 1: Fundamentals of Quantitative Design and Analysis Chap 2: Memory Hierarchy Design Chap 3: Instruction-Level Parallelism and Its Exploitation Chap 4: Data-Level Parallelism in Vector, SIMD, and GPU Architectures Chap 5: Multiprocessors and Thread-Level Parallelism Chap 6: The Warehouse-Scale Computer App A: Instruction Set Principles App B: Review of Memory Hierarchy App C: Pipelining: Basic and Intermediate Concepts Online App D: Storage Systems App E: Embedded Systems App F: Interconnection Networks App G: Vector Processors App H: Hardware and Software for VLIW and EPIC App I: Large-Scale Multiprocessors and Scientific Applications App J: Computer Arithmetic App K: Survey of Instruction Set Architectures App L: Historical Perspectives